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2016-09-21anv: pipeline: use correct number of thread for computeHEADmasterLionel Landwerlin1-1/+4
Reproduces this commit : commit 0fb85ac08d61d365e67c8f79d6955e9f89543560 Author: Kenneth Graunke <kenneth@whitecape.org> Date: Mon Jun 6 21:37:34 2016 -0700 i965: Use the correct number of threads for compute shaders. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-21anv: allocator: correct scratch space for haswellLionel Landwerlin1-1/+21
This reproduces this commit : commit 2213ffdb4bb79856f0556bdf2bfd4bdf57720232 Author: Kenneth Graunke <kenneth@whitecape.org> Date: Mon Jun 6 21:37:34 2016 -0700 i965: Allocate scratch space for the maximum number of compute threads. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-21anv: device: calculate compute thread numbers using subslices numbersLionel Landwerlin6-18/+74
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-21gallivm: support negation on 64-bit integersNicolai Hähnle1-0/+4
This should be analogous to 32-bit integers. Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-09-21radeonsi: prepare 64-bit integer support. (v2)Dave Airlie1-7/+62
v2: - no PIPE_CAP_INT64 yet - emit DIV/MOD without the divide-by-zero workaround Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1) Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-09-21gallivm/llvmpipe: prepare support for ARB_gpu_shader_int64.Dave Airlie5-5/+500
This enables 64-bit integer support in gallivm and llvmpipe. v2: add conversion opcodes. v3: - PIPE_CAP_INT64 is not there yet - restrict DIV/MOD defaults to the CPU, as for 32 bits - TGSI_OPCODE_I2U64 becomes TGSI_OPCODE_U2I64 Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-09-21tgsi/softpipe: prepare ARB_gpu_shader_int64 support. (v3)Dave Airlie1-132/+541
This adds all the opcodes to tgsi_exec for softpipe to use. v2: add conversion opcodes. v3: - no PIPE_CAP_INT64 yet - change TGSI_OPCODE_I2U64 to TGSI_OPCODE_U2I64 Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-09-21gallium/tgsi: add support for 64-bit integer immediates.Dave Airlie7-2/+117
This adds support to TGSI for 64-bit integer immediates. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-09-21gallium: add opcode and types for 64-bit integers. (v3)Dave Airlie4-20/+362
This just adds the basic support for 64-bit opcodes, and the new types. v2: add conversion opcodes. add documentation. v3: - make docs more consistent - change TGSI_OPCODE_I2U64 to TGSI_OPCODE_U2I64 Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2) Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-09-21i965: Rename intelScreen to screen.Kenneth Graunke28-170/+170
"intelScreen" is wordy and also doesn't fit our style guidelines. "screen" is shorter, which is nice, because we use it fairly often. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-09-21i965: Rename __DRIScreen pointers to "dri_screen".Kenneth Graunke6-83/+85
I want to use "screen" as the variable name for a struct intel_screen pointer. This means that we can't use it for __DRIscreen pointers. Sometimes we called it "screen", sometimes "sPriv", sometimes "driScrnPriv", and sometimes "psp" (Pointer to Screen Private?). The last one is particularly confusing because we use "psp" to refer to the Gen4 PIPELINED_STATE_POINTERS packet as well. Let's be consistent. "dri_screen" is clear, and it's not used often enough that I'm worried about the verbosity. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-09-20mesa: Implement ARB_shader_viewport_layer_array for i965Dylan Baker8-3/+20
This extension is a combination of AMD_vertex_shader_viewport_index and AMD_vertex_shader_layer, making it rather trivial to implement. For gallium I *think* this needs a new cap because of the addition of support in tessellation evaluation shaders, and since I don't have any hardware to test it on, I've left that for someone else to wire up. Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-20radeon/vce: add firmware support for version 52.8.3Leo Liu1-0/+3
Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2016-09-20st/omx/dec/h265: Correct the timestampingIndrajit Das1-1/+12
(derived from commit 3b6bda665a5a890f2c98e19d2939d7de92b8cb4c) v2: fix the tabs(Leo) Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nishanth Peethambaran <nishanth.peethambaran@amd.com> Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com> Signed-off-by: Leo Liu <leo.liu@amd.com>
2016-09-20aubinator: add a custom handler for immediate register loadLionel Landwerlin3-3/+47
Transforming this : 0x00c77084: 0x11000001: MI_LOAD_REGISTER_IMM 0x00c77088: 0x0000b020 : Dword 1 Register Offset: 0x0000b020 0x00c7708c: 0x00880038 : Dword 2 Data DWord: 8912952 Into this: 0x007880f0: 0x11000001: MI_LOAD_REGISTER_IMM 0x007880f4: 0x0000b020 : Dword 1 Register Offset: 0x0000b020 0x007880f8: 0x00080040 : Dword 2 Data DWord: 524352 register L3CNTLREG2 (0xb020) : 0x80040 SLM Enable: 0 URB Allocation: 32 URB Low Bandwidth: 0 RO Allocation: 32 RO Low Bandwidth: 0 DC Allocation: 0 DC Low Bandwidth: 0 v2: Drop unused arguments (Sirisha) Print out register name Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2016-09-20st/va: flush the context before calling flush_frontbuffer(v2)Nayan Deshmukh1-1/+5
so that the texture is rendered to back buffer before calling flush_frontbuffer and can be copied to a different buffer in the function v2: change comment style Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Acked-by: Christian König <christian.koenig@amd.com>
2016-09-20st/vdpau: flush the context before calling flush_frontbufferNayan Deshmukh1-2/+5
so that the texture is rendered to back buffer before calling flush_frontbuffer and can be copied to a different buffer in the function Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Acked-by: Christian König <christian.koenig@amd.com>
2016-09-20vl/dri3: handle the case of different GPU(v4.2)Nayan Deshmukh1-13/+53
In case of prime when rendering is done on GPU other then the server GPU, use a seprate linear buffer for each back buffer which will be displayed using present extension. v2: Use a seprate linear buffer for each back buffer (Michel) v3: Change variable names and fix coding style (Leo and Emil) v4: Use PIPE_BIND_SAMPLER_VIEW for back buffer in case when a seprate linear buffer is used (Michel) v4.1: remove empty line v4.2: destroy the context and handle the case when create_context fails (Emil) Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Acked-by: Michel Dänzer <michel.daenzer@amd.com> Acked-by: Christian König <christian.koenig@amd.com>
2016-09-20st/vdpau: fix argument type to vlVdpOutputSurfaceDMABufIlia Mirkin2-2/+2
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Christian König <christian.koenig@amd.com>
2016-09-20swr: [rasterizer core] Better thread destructionTim Rowley8-69/+126
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-09-20swr: [rasterizer jitter] Fix missing end-of-file newlineTim Rowley1-1/+2
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-09-20swr: [rasterizer core] Add macros for mapping ArchRast to bucketsTim Rowley11-200/+249
Switch all RDTSC_START/STOP macros to use AR_BEGIN/END macros. Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-09-19glsl: Skip "unsized arrays aren't allowed" check for TCS/TES/GS vars.Kenneth Graunke1-1/+27
Fixes ESEXT-CTS.draw_elements_base_vertex_tests.AEP_shader_stages and ESEXT-CTS.texture_cube_map_array.texture_size_tesselation_con_sh. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-09-19nvc0: get rid of nvc0_stage_sampler_states_bind_range()Samuel Pitoiset1-74/+9
Same thing as nvc0_stage_set_sampler_views_range(). Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-09-19nvc0: get rid of nvc0_stage_set_sampler_views_range()Samuel Pitoiset1-89/+15
This function was quite similar to nvc0_stage_set_sampler_views() and I don't see any reasons to not remove it. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-09-18nv50/ir: optimize SUB(a, b) to MOV(a - b)Samuel Pitoiset1-0/+10
This helps shaders in UE4 demos, especially with Elemental (+1% perf). This optimization reduces spilling usage in one shader which explains the little gain. GF100/GK104: total instructions in shared programs :2838551 -> 2838045 (-0.02%) total gprs used in shared programs :396706 -> 396684 (-0.01%) total local used in shared programs :34432 -> 34416 (-0.05%) local gpr inst bytes helped 1 19 112 112 hurt 0 0 0 0 Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-09-18gk110/ir: fix wrong emission of OP_NOTSamuel Pitoiset1-1/+1
This should emit src0 instead of src1. Found by inspection. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org
2016-09-18r600g/sb: fix struct/class declaration conflictsMartina Kollarova1-5/+1
A couple of forward-declarations were causing warnings in clang: 'value' defined as a class here but previously declared as a struct [-Wmismatched-tags] Signed-off-by: Martina Kollarova <martina.kollarova@intel.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-09-17i965: Drop assertion about buffer offset at draw time.Eric Anholt1-11/+0
Given robust access, we should just be returning zeroes if the user gives us a base pointer that's too big, which is what was happens on a release build. This was caught by a webgl conformance test for out-of-bounds draws on servo. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-09-17tgsi: Enable returns from within loopsLars Hamre1-0/+4
Fixes the following piglit test (for softpipe): /spec/glsl-1.10/execution/fs-loop-return Signed-off-by: Lars Hamre <chemecse@gmail.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: relax restriction of compressed formats for texture uploadCharmaine Lee1-3/+22
This patch relaxes the restriction of compressed formats for texture upload buffer. For now, 3D texture with compressed format is still not supported in the texture upload buffer path. As Brian noted, ETQW does many texture updates with glCompressedTexSubImage. This patch greatly improves the performance of the ETQW trace. Tested with ETQW, MTT piglit, glretrace, conform, viewperf v2: Per Brian's suggestion, removed the subregion boundary check. Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: skip query flush if we already have the query resultBrian Paul1-5/+5
This reduces the number of times we flush in some situations (the arbocclude demo is one trivial example). Tested with Piglit, ETQW, Sauerbraten, arbocclude. Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-09-17svga: remove unneeded svga_context_flush() in svga_end_query()Brian Paul1-5/+0
Since commit 99d8fe20abe1f we don't have to flush the command buffer when we end a query. Tested with Piglit, Sauerbraten, arbocclude, ETQW (noticably faster now). Reviewed-by: José Fonseca <jfonseca@vmware.com>
2016-09-17svga: use upload buffer for upload texture.Charmaine Lee6-26/+279
With this patch, when running with vgpu10, instead of mapping directly to the guest backed memory for texture update, we'll use the texture upload buffer and use the transfer from buffer command to update the host side texture memory. This optimization yields about 20% performance improvement with Lightsmark2008 and about 40% with Tropics. Tested with Lightsmark2008, Tropics, Heaven, MTT piglit, glretrace, conform. Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: refactor svga_texture_transfer_map/unmap functionsCharmaine Lee1-217/+272
Split the functions into separate functions for dma and direct map to make the code more readable. Tested with MTT piglit, glretrace, viewperf, conform, various OpenGL apps Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: add SVGA3d_vgpu10_TransferFromBuffer()Charmaine Lee3-0/+51
Also add the corresponding dump function to dump the TransferFromBuffer command. Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: single sample surface can be created as non-multisamples surfaceCharmaine Lee2-2/+6
With this patch, single sample surface will be created as non-multisamples surface. Tested with piglit, glretrace. Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: fix memory leak with sampler stateCharmaine Lee1-3/+0
This patch fixes a memory leak with sampler state when piglit is run with HW version 11. Sampler state clean up was incorrectly skipped in svga_cleanup_sampler_state() for vgpu9. Tested with piglit. Reviewed-by: Neha Bhende <bhenden@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: fix prim type check/assignment in translate_indices()Brian Paul1-2/+2
Left over test code spotted by Sinclair. Tested with piglit, Google Earth, Lightsmark, Heaven4, glretraces, etc. Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2016-09-17svga: use SVGA3D_QUERYTYPE_MAX for svga query type checkCharmaine Lee1-3/+3
Use SVGA3D_QUERYTYPE_MAX instead of SVGA_QUERY_MAX for svga query type check. Tested with various OpenGL apps with GALLIUM_HUD set. Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: split the num-resources-mapped hud to textures & buffersCharmaine Lee5-12/+26
Replace the num-resources-mapped hud with num-textures-mapped and num-buffers-mapped, so we can differentiate the map counts for these two different resources. Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: change svga hud defines to enumsCharmaine Lee1-22/+25
This will make it easier to add new hud types. Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: implement an index buffer translation cacheBrian Paul5-6/+84
Some OpenGL apps, like Cinebench R15, have many glDrawElements(GL_QUADS) calls. Since we don't directly support quads we have to convert these calls into GL_TRIANGLES which involves generating a new index buffer. This patch saves the new/translated index buffer in the hope that it can be reused for a later draw call. Cinebench R15 increases by about 20% with this change. The NobelClinician Viewer app also hits this code. Tested with full piglit run. Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-09-17svga: try to emit fewer buffer rebind commandsBrian Paul5-5/+60
If a consecutive sequence of drawing commands references the same vertex/index buffers, there should be no need to rebind the surfaces for the second and subsequent drawing commands. Apps that use multiple display lists benefit from this since the vertex data for several display lists is often stored in one buffer. In the case of the legacy E&S Glaze demo, this reduces the size of our command buffers from 91KB to 44KB. One WSI Fusion trace shows a 33% reduction in command buffer sizes. Tested with full piglit run. Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-09-17svga: reduce unmapping/remapping of the default constant bufferBrian Paul3-6/+40
Previously, every time we put shader constants into the default constant buffer we called u_upload_alloc(), which mapped the buffer, and u_upload_unmap(). We had to unmap the buffer before calling svga_buffer_handle() to get the winsys handle for the buffer. But we really only need to do that the first time we reference the const buffer. Now we try to keep the upload manager's buffer mapped until we fill it or flush the command buffer. v2: add additional comment on the buffer unmapping code in svga_context_flush(), per Charmaine. Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-09-17svga: optimize memcpy() in svga_buffer_update_hw()Brian Paul1-1/+8
When we migrate a buffer from sw/malloc storage to a hardware buffer, don't memcpy the whole buffer, just copy the part we've written to. Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-09-17svga: Use comparison between svga texture types to use PredCopyRegion commandNeha Bhende1-6/+9
PredCopyRegion support copy between same type of textures. Instead of comparing src and dst pipe texture type, compare svga texture type which can avoid some software fallback. for example, it avoids a software blit with the Redway3D Aston demo. Tested piglit tests on VGPU9 and VGPU10 on GL/DX11Renderer, Redway3D Aston demo v2: some nit pick suggested by Charmaine. Reviewed-by: Charmaine Lee <charmainel@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17svga: Add function svga_resource_type()Neha Bhende2-19/+21
This function returns svga texture type for corresponding pipe texture. Reviewed-by: Charmaine Lee <charmainel@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2016-09-17nvc0/ir: fix subops for IMADSamuel Pitoiset1-4/+6
Offset was wrong, it's at bit 8, not 4. Also, uses subr instead of sub when src2 has neg. Similar to GK110 now. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: mesa-stable@lists.freedesktop.org
2016-09-17nvc0/ir: fix comments about instructions infoSamuel Pitoiset1-2/+3
The comment for the commutative flags was wrong because OP_MUL is before OP_MAD. While we are at it add missing opcodes, and fix the comment about the short forms. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>