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authorKever Yang <kever.yang@rock-chips.com>2017-06-08 07:32:04 (GMT)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-07-11 13:23:38 (GMT)
commitfe450895ff1a828d39bfd09082000149f2c8d9c3 (patch)
treece752090d97e752f667445592a79eb59a40edd4e
parenta84b589e5dc3b274f0fde25e89ed8401adefdce7 (diff)
downloadu-boot-rockchip-fe450895ff1a828d39bfd09082000149f2c8d9c3.tar.gz
u-boot-rockchip-fe450895ff1a828d39bfd09082000149f2c8d9c3.tar.xz
rockchip: pinctrl: rk3328: use gpio instead of sdmmc-pwren
SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may be high active or low active, the dwmmc driver always assume the sdmmc-pwren as high active. Kernel treat this pin as fixed regulator instead of a pin from controller, and then it can set in dts file upon board schematic, that's a good solution, we can also do this in u-boot. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-rw-r--r--drivers/pinctrl/rockchip/pinctrl_rk3328.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3328.c b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
index efa5b31..c74163e 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3328.c
@@ -184,13 +184,11 @@ static void pinctrl_rk3328_sdmmc_config(struct rk3328_grf_regs *grf,
if (com_iomux & IOMUX_SEL_SDMMC_MASK)
rk_clrsetreg(&grf->gpio0d_iomux,
GPIO0D6_SEL_MASK,
- GPIO0D6_SDMMC0_PWRENM1
- << GPIO0D6_SEL_SHIFT);
+ GPIO0D6_GPIO << GPIO0D6_SEL_SHIFT);
else
rk_clrsetreg(&grf->gpio2a_iomux,
GPIO2A7_SEL_MASK,
- GPIO2A7_SDMMC0_PWRENM0
- << GPIO2A7_SEL_SHIFT);
+ GPIO2A7_GPIO << GPIO2A7_SEL_SHIFT);
rk_clrsetreg(&grf->gpio1a_iomux,
GPIO1A0_SEL_MASK,
GPIO1A0_CARD_DATA_CLK_CMD_DETN