summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMeng Dongyang <daniel.meng@rock-chips.com>2017-06-28 11:22:45 (GMT)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-07-11 10:13:49 (GMT)
commit863456ade33803538645985046b5ecaa27e618b4 (patch)
tree0449b08257b90b5e8734288443d08ff930f50d53
parentc93bef9323f5a9ede9a4d140d030afb22330b550 (diff)
downloadu-boot-rockchip-863456ade33803538645985046b5ecaa27e618b4.tar.gz
u-boot-rockchip-863456ade33803538645985046b5ecaa27e618b4.tar.xz
rockchip: dts: rk3328: support and enable dwc2
Enable dwc2 controller and add fixed regulator for dwc2 controller to control vbus. Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-rw-r--r--arch/arm/dts/rk3328-evb.dts14
-rw-r--r--arch/arm/dts/rk3328.dtsi10
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 4cf6d2e..220d0ab 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -15,6 +15,15 @@
stdout-path = &uart2;
};
+ vcc5v0_otg: vcc5v0-otg-drv {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ regulator-name = "vcc5v0_otg";
+ gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
vcc5v0_host_xhci: vcc5v0-host-xhci-drv {
compatible = "regulator-fixed";
enable-active-high;
@@ -61,6 +70,11 @@
status = "okay";
};
+&usb20_otg {
+ vbus-supply = <&vcc5v0_otg>;
+ status = "okay";
+};
+
&usb_host0_xhci {
vbus-supply = <&vcc5v0_host_xhci>;
status = "okay";
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index a57176d..35e02f5 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -467,6 +467,16 @@
status = "disabled";
};
+ usb20_otg: usb@ff580000 {
+ compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb",
+ "snps,dwc2";
+ reg = <0x0 0xff580000 0x0 0x40000>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ hnp-srp-disable;
+ dr_mode = "otg";
+ status = "disabled";
+ };
+
sdmmc_ext: rksdmmc@ff5f0000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff5f0000 0x0 0x4000>;